This is a description of the original CBM IEEE-488 module for the C64, and of the following files: README - this text schematics.ps - schematic diagram (PostScript) schematics.tif - schematic diagram (TIFF) eprom.bin - EPROM (4 kB, raw binary) I've drawn the schematics from my own IEEE-488 module. The print on the board is "ASSY NO. 250418 REV.A" and "P/N NO. 250411 REV.B". The EPROM is a HN482732 (4 kB EPROM, 300ns), but only the lower 2 kB are used. The module has a slot for an additional ROM-cartridge, so there is a bit of TTL-logic to switch between the ROM of the module and the additional one. Here is a short description of how it works (as far as I understood): After Reset, the I/O-lines of the MOS 6525 ("Tri-Port Interface", see [1]) are set to input, so they are high-z, and those who are used to drive other inputs, should be pulled up to high-level (this "should" has to be explained, see below). Thereby the /EXROM-line of the C64 expansion slot is activated by the inverted line PC3 of the 6525. The C64 enables the module-EPROM by pulling /ROML to low, which is combined with PC4, so that the EPROM is only selected while /ROML is low and PC4 is high. Now the C64 finds the "CBM80" header in the EPROM at $800x and starts the initialization. This does a few things: first it copies the code from $8030 ... $87FF to the RAM at $C830 ... $CFFF and sets the appropriate vectors. Then it disables the EPROM by pulling PC4 to low. /ROML from the C64 is now passed through to the /ROML-line of the additional cartridge slot. If there is no additional cartridge (which would pull PC7 to low by it's /EXROM-line), the /EXROM-line of the C64 is deactivated by setting PC3 to low, which finally causes the C64 to disable /ROML and to enable RAM at $8000. Note that the code for the IEEE-routines is relocated in the RAM. It is also executable in the EPROM, if you activate the /EXROM-line with the following statments: lda $df02 ; (data direction register must be set before, see [1]) ora #$18 ; PC3=PC4=high => /EXROM=low, EPROM selected with /ROML sta $df02 jsr $807a ; rest of modules NMI/RESET (RTS in $80BD) lda #$00 ; flag: no more cartridge php jmp $80db ; entry before RAM-test and Basic-coldboot But this way, you cannot use the RAM above $8000 from BASIC and the SAVE- routines of the EPROM cannot be used this way, because they would save the EPROM instead of the RAM, if you try to save RAM above $8000 ! And the next stop/restore activates the RAM-version again. Another idea would be to write your own routines to run in the RAM or in a patched kernal, which use parts of the modules EPROM by switching it on and off. When I bought my IEEE-488 module, which was declared to be defective, the EPROM didn't come up, because the gates driven by PC3 and PC4 had not been pulled to high correctly on Reset, as described above. I replaced the inverter IC "U6" (originally a "MOS 7713") by an ordinary "74LS04" and added two pull-up resistors to PC3 and PC4 (3.3 kOhm, labelled with "Rx" in my schematics, not provided on the original board). With these changes, the interface works fine. There is another detail, that seems to be wrong in the design of the interface: according to [1], /CS may be gated with the clock signal Phi2 to guarantee that R/W is stable when /CS is low. In the module, /CS of the 6525 is directly connected to I/O2, which seems not to depend on Phi2, but instead the R/W-line is AND-gated with the clock signal Phi2. I didn't measure it, but this might produce write pulses to the 6525 before and after every access to the I/O-area at $DFxx. So I am very estonished, how this interface can work, but it does ! But I think, it would be better to change it: "/CS := I/O2 OR NOT Phi2" might be the right way, but this can't be achived with the gates found on the original board. Andre Fachat ([2]) also sketched the schematics of his module, but without the ROM-switching logic, and with a little mistake in the R/W-line (see [3]). Now he checked his module referring to my schematics, and he wrote that this is correct. He has the same module with the same prints and EPROM. Only the inverter IC of his interface was originally a "74LS04", and it works without the additional pull-up resistors. He wrote his own Kernal-patches, which allow the use of the IEEE-488 module whithout it's EPROM or any code in RAM, and a mixed use of parallel IEEE-488 and serial IEC devices (see [4]). Note that Andre announced, that his pages will cease to exist under this address in June or July 1999. Hope, we will find him again (should be no problem, as he is a member of the VICE team, see [5]). The C64 emulator VICE (MSDOS version 1.0, [5]) emulates the IEEE-488 interface, but without the EPROM section. To access an emulated IEEE-488 drive (model 2031 in menu "Disk Drive Settings", true drive emulation: on), you may either replace the kernal file of the emulator by Anrde's patched version [4], or you may load the content of the modules EPROM to RAM from a file and activate it by a software reset (SYS 64738). To load it from Basic or from VICE's built in Monitor, it must be in the CBM format (with 2 bytes address prefix: $00 $80 for address $8000). If you only have the raw binary, you can convert it with my little tool bin2cbm.exe (should be found in [6]). But Andre wrote, that they are working on the emulation of the ROM code. [1] http://www.funet.fi/pub/cbm/documents/chipdata/6525.zip [2] http://www.tu-chemnitz.de/~fachat/ , a.fachat@physik.tu-chemnitz.de [3] http://www.tu-chemnitz.de/~fachat/8bit/ieee488/ieee-c64b.gif [4] http://www.tu-chemnitz.de/~fachat/8bit/c64/kernal/index.html [5] http://www.cs.cmu.edu/~dsladic/vice/vice.html Or http://www.funet.fi/pub/cbm/crossplatform/emulators/VICE/ [6] http://www.funet.fi/pub/cbm/crossplatform/converters/msdos/convert.zip july 1999, Wolfgang Guenther (woll@informatik.uni-bremen.de)